literature_review/literature_r...

@article{goto_2008,
  author = {Goto, Kazushige and Geijn, Robert A. van de},
  title = {Anatomy of High-performance Matrix Multiplication},
  journal = {ACM Trans. Math. Softw.},
  issue_date = {May 2008},
  volume = {34},
  number = {3},
  month = may,
  year = {2008},
  issn = {0098-3500},
  pages = {12:1--12:25},
  articleno = {12},
  numpages = {25},
  url = {http://doi.acm.org/10.1145/1356052.1356053},
  doi = {10.1145/1356052.1356053},
  acmid = {1356053},
  publisher = {ACM},
  address = {New York, NY, USA},
  keywords = {Linear algebra, basic linear algebra subprogrms, matrix multiplication},
} 

@Inbook{sweetman_2007,
  edition={2},
  title={See MIPS Run: Linux; Second Edition},
  publisher={Morgan Kaufmann Publishers},
  author={Sweetman, Dominic},
  year={2007},
  pages={81}
}

@article{paikaray_2013,
  author    = {Bijay Paikaray},
  title     = {Relative Performance of a Multi-level Cache with Last-Level Cache
    Replacement: An Analytic Review},
  journal   = {CoRR},
  volume    = {abs/1307.6406},
  year      = {2013},
  url       = {http://arxiv.org/abs/1307.6406},
  archivePrefix = {arXiv},
  eprint    = {1307.6406},
  timestamp = {Wed, 07 Jun 2017 14:40:21 +0200},
  biburl    = {http://dblp.org/rec/bib/journals/corr/Paikaray13},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}

@Inbook{weidendorfer_2004,
  author="Weidendorfer, Josef
    and Kowarschik, Markus
    and Trinitis, Carsten",
  editor="Bubak, Marian
    and van Albada, Geert Dick
    and Sloot, Peter M. A.
    and Dongarra, Jack",
  title="A Tool Suite for Simulation Based Analysis of Memory Access Behavior",
  bookTitle="Computational Science - ICCS 2004: 4th International Conference, Krak{\'o}w, Poland, June 6-9, 2004, Proceedings, Part III",
  year="2004",
  publisher="Springer Berlin Heidelberg",
  address="Berlin, Heidelberg",
  pages="440--447",
  abstract="In this paper, two tools are presented: an execution driven cache simulator which relates event metrics to a dynamically built-up call-graph, and a graphical front end able to visualize the generated data in various ways. To get a general purpose, easy-to-use tool suite, the simulation approach allows us to take advantage of runtime instrumentation, i.e. no preparation of application code is needed, and enables for sophisticated preprocessing of the data already in the simulation phase. In an ongoing project, research on advanced cache analysis is based on these tools. Taking a multigrid solver as an example, we present the results obtained from the cache simulation together with real data measured by hardware performance counters.",
  isbn="978-3-540-24688-6",
  doi="10.1007/978-3-540-24688-6_58",
  url="https://doi.org/10.1007/978-3-540-24688-6_58"
}

@article{nethercote_2004,
  author = {Nethercote, Nicholas},
  year = {2004},
  month = {01},
  title = {Dynamic Binary Analysis and Instrumentation}
}

@article{kaparelos_2014,
  month = {June},
  author = {Stavros Kaparelos},
  series = {Department of Computer Science Technical Report Series},
  note = {Undergraduate dissertation supervised by Professor James Davenport},
  title = {Extending Cachegrind: L2 cache inclusion and TLB measuring},
  publisher = {Department of Computer Science, University of Bath},
  year = {2014},
  keywords = {computer performance,cache utilization,tlb},
  url = {http://opus.bath.ac.uk/39762/},
  abstract = {Programmers need to develop hardware conscious software in order to optimise efficiency and increase execution speed. To do that, they need tools that can provide such kind of information. Cachegrind is such a tool. It is a cache profiling tool that provides statistics for level 1 and the last level caches. This project extended Cachegrind, firstly, to include information for L2 cache when 3 levels of cache are present and, secondly, to measure the Translation Lookaside Buer (TLB). L2 cache inclusion presents the same information as presented in the other cache levels, while measuring the TLB provides a) the number of hits and misses, b) the pages used and the times used and c) per file, per function and, per source code line statistics. Any extension is developed to work in an Intel x86 architecture. Finally, extensions have been tested and results have been checked to be logical, as well as to be along the lines of the expected ones.}
}

@misc{forum_2017,
  title={AMD Discloses New Technologies At Microprocessor Forum},
  howpublished={\url{https://web.archive.org/web/20120308030806/http://www.amd.com/us/press-releases/Pages/Press_Release_751.aspx}},
  year={2017},
  note={[Online; accessed 20-November-2017]}
}

@misc{isambard_2017,
  title={GW4 joins industry partners to develop ‘first of its kind’ supercomputer},
  howpublished={\url{http://gw4.ac.uk/news/gw4-joins-industry-partners-develop-first-kind-supercomputer/}},
  year={2017},
  note={[Online; accessed 20-November-2017]}
}

@book{hennessy_2011,
  title={Computer Organization and Design, Revised Fourth Edition},
  publisher={Morgan Kaufmann},
  author={Hennessy, John L},
  year={2011},
  pages={456}
}

@inproceedings{gaur_2011,
 author = {Gaur, Jayesh and Chaudhuri, Mainak and Subramoney, Sreenivas},
 title = {Bypass and Insertion Algorithms for Exclusive Last-level Caches},
 booktitle = {Proceedings of the 38th Annual International Symposium on Computer Architecture},
 series = {ISCA '11},
 year = {2011},
 isbn = {978-1-4503-0472-6},
 location = {San Jose, California, USA},
 pages = {81--92},
 numpages = {12},
 url = {http://doi.acm.org/10.1145/2000064.2000075},
 doi = {10.1145/2000064.2000075},
 acmid = {2000075},
 publisher = {ACM},
 address = {New York, NY, USA},
 keywords = {bypass policy, exclusive last-level cache, insertion policy},
}

@article{smith_1982,
 author = {Smith, Alan Jay},
 title = {Cache Memories},
 journal = {ACM Comput. Surv.},
 issue_date = {Sept. 1982},
 volume = {14},
 number = {3},
 month = sep,
 year = {1982},
 issn = {0360-0300},
 pages = {473--530},
 numpages = {58},
 url = {http://doi.acm.org/10.1145/356887.356892},
 doi = {10.1145/356887.356892},
 acmid = {356892},
 publisher = {ACM},
 address = {New York, NY, USA},
}